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| ? 2009 microchip technology inc. ds22182a-page 1 MCP6051/2/4 features ? low offset voltage: 150 v (maximum) ? low quiescent current: 30 a (typical) ? rail-to-rail input and output ? wide supply voltage range: 1.8v to 6.0v ? gain bandwidth product: 385 khz (typical) ? unity gain stable ? extended temperature range: -40c to +125c ? no phase reversal applications ? automotive ? portable instrumentation ? sensor conditioning ? battery powered systems ? medical instrumentation ? test equipment ? analog filters design aids ? spice macro models ? filterlab ? software ? mindi ? circuit designer & simulator ? microchip advanced part selector (maps) ? analog demonstration and evaluation boards ? application notes typical application description the microchip technology inc. MCP6051/2/4 family of operational amplifiers (op amps) has low input offset voltage ( 150 v, maximum) and ra il-to-rail input and output operation. this family is unity gain stable and has a gain bandwidth product of 385 khz (typical). these devices operate with a single supply voltage as low as 1.8v, while drawing low quiescent current per amplifier (30 a, typical). these features make the family of op amps well suited for single-supply, high precision, battery-p owered applications. the MCP6051/2/4 family is offered in single (MCP6051), dual (mcp6052), and quad (mcp6054) configurations. the MCP6051/2/4 is designed with microchip?s advanced cmos process. all devices are available in the extended temperature range, with a power supply range of 1.8v to 6.0v. package types r l v out gyrator z in r c z in r l j l + = lr l rc = MCP6051 * includes exposed thermal pad (ep); see table 3-1 . 1 2 3 4 8 7 6 5 ep 9 v dd v out nc nc v in + v in ? v ss nc 1 2 3 4 8 7 6 5 ep 9 v outb v inb ? v inb + v dd v ina + v ina ? v ss v outa v ina + v ina ? v dd 1 2 3 4 14 13 12 11 v outa v outd v ind ? v ind + v ss v inb + 5 10 v inc + v inb ? 6 9 v outb 7 8 v outc v inc ? v ina + v ina ? v ss 1 2 3 4 8 7 6 5 v outa v dd v outb v inb ? v inb + v in + v in ? v ss 1 2 3 4 8 7 6 5 nc nc v dd v out nc MCP6051 soic mcp6052 soic MCP6051 2x3 tdfn * mcp6054 soic, tssop mcp6052 2x3 tdfn * 30 a, high precision op amps
MCP6051/2/4 ds22182a-page 2 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 3 MCP6051/2/4 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ? v ss ........................................................................7.0v current at input pins .....................................................2 ma analog inputs (v in + , v in - )?? .......... v ss ? 1.0v to v dd + 1.0v all other inputs and outputs ......... v ss ? 0.3v to v dd + 0.3v difference input voltage ...................................... |v dd ? v ss | output short-circuit current .................................continuous current at output and supply pins ............................30 ma storage temperature ....................................-65c to +150c maximum junction temperature (t j ).......................... +150c esd protection on all pins (hbm; mm) ................ 4 kv; 400v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ?? see 4.1.2 ?input voltage and current limits? 1.2 specifications table 1-1: dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +1.8v to +6.0v, v ss = gnd, t a = +25c, v cm = v dd /2, v out v dd /2, v l = v dd /2 and r l = 100 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions input offset input offset voltage v os -150 ? +150 v v dd = 3.0v, v cm = v dd /3 input offset drift with temperature v os / t a ? 1.5 ? v/c t a = -40c to +85c, v dd = 3.0v, v cm = v dd /3 v os / t a ? 4.0 ? v/c t a = +85c to +125c, v dd = 3.0v, v cm = v dd /3 power supply rejection ratio psrr 70 87 ? db v cm = v ss input bias current and impedance input bias current i b ? 1.0 100 pa i b ?60?pat a = +85c i b ? 1100 5000 pa t a = +125c input offset current i os ? 1.0 ? pa common mode input impedance z cm ?10 13 ||6 ? ||pf differential input impedance z diff ?10 13 ||6 ? ||pf common mode common mode input voltage range v cmr v ss ? 0.2 ? v dd +0.2 v v dd = 1.8v (note 1) v cmr v ss ? 0.3 ? v dd +0.3 v v dd = 6.0v (note 1) common mode rejection ratio cmrr 74 90 ? db v cm = -0.2v to 2.0v, v dd = 1.8v 74 91 ? db v cm = -0.3v to 6.3v, v dd = 6.0v 72 87 ? db v cm = 3.0v to 6.3v, v dd = 6.0v 74 89 ? db v cm = -0.3v to 3.0v, v dd = 6.0v note 1: figure 2-13 shows how v cmr changed across temperature. MCP6051/2/4 ds22182a-page 4 ? 2009 microchip technology inc. table 1-2: ac electrical specifications table 1-3: temperature specifications open-loop gain dc open-loop gain (large signal) a ol 95 115 ? db 0.2v < v out <(v dd -0.2v) v cm = v ss output maximum output voltage swing v ol, v oh v ss +15 ? v dd ?15 mv g = +2 v/v, 0.5v input overdrive output short-circuit current i sc ?5?mav dd = 1.8v ?26?mav dd = 6.0v power supply supply voltage v dd 1.8 ? 6.0 v quiescent current per amplifier i q 15 30 45 a i o = 0, v dd = 6.0v v cm = 0.9v dd electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +1.8 to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. (refer to figure 1-1 ). parameters sym min typ max units conditions ac response gain bandwidth product gbwp ? 385 ? khz phase margin pm ? 61 ? g = +1 v/v slew rate sr ? 0.15 ? v/s noise input noise voltage e ni ? 5.0 ? vp-p f = 0.1 hz to 10 hz input noise voltage density e ni ?34?nv/ hz f = 10 khz input noise current density i ni ?0.6?fa/ hz f = 1 khz electrical characteristics: unless otherwise indicated, v dd = +1.8v to +6.0v and v ss = gnd. parameters sym min typ max units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 8l-2x3 tdfn ja ?41?c/w thermal resistance, 8l-soic ja ?149.5?c/w thermal resistance, 14l-soic ja ? 95.3 ? c/w thermal resistance, 14l-tssop ja ? 100 ? c/w note 1: the internal junction temperature (t j ) must not exceed the absolute ma ximum specification of +150c. table 1-1: dc electrical specifications (continued) electrical characteristics : unless otherwise indicated, v dd = +1.8v to +6.0v, v ss = gnd, t a = +25c, v cm = v dd /2, v out v dd /2, v l = v dd /2 and r l = 100 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions note 1: figure 2-13 shows how v cmr changed across temperature. ? 2009 microchip technology inc. ds22182a-page 5 MCP6051/2/4 1.3 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . this circuit can independently set v cm and v out ; see equation 1-1 . note that v cm is not the circuit?s common mode voltage ((v p +v m )/2), and that v ost includes v os plus the effects (on the input offset error, v ost ) of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. g dm r f r g ? = v cm v p v dd 2 ? + () 2 ? = v out v dd 2 ? () v p v m ? () v ost 1g dm + () ++ = where: g dm = differential mode gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in? v in+ ? = v dd r g r f v out v m c b2 c l r l v l c b1 100 k 100 k r g r f v dd /2 v p 100 k 100 k 60 pf 10 k 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf mcp605x MCP6051/2/4 ds22182a-page 6 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 7 MCP6051/2/4 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-1: input offset voltage with v dd = 3.0v. figure 2-2: input offset voltage drift with v dd = 3.0v and t a +85c. figure 2-3: input offset voltage drift with v dd = 3.0v and t a +85c. figure 2-4: input offset voltage vs. common mode input voltage with v dd = 6.0v. figure 2-5: input offset voltage vs. common mode input voltage with v dd = 3.0v. figure 2-6: input offset voltage vs. common mode input voltage with v dd = 1.8v. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% -150 -120 -90 -60 -30 0 30 60 90 120 150 input offset voltage (v) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd /3 0% 3% 6% 9% 12% 15% 18% 21% 24% 27% -20 -16 -12 -8 -4 0 4 8 12 16 20 input offset drift with temperature (v/c) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd /3 t a = -40 c to +85c 0% 3% 6% 9% 12% 15% 18% 21% 24% 27% -20 -16 -12 -8 -4 0 4 8 12 16 20 input offset drift with temperature (v/c) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd / 3 t a = +85 c to +125c -750 -600 -450 -300 -150 0 150 300 450 600 750 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input offset voltage (v) t a = -40c t a = +25c t a = +85c t a = +125c v dd = 6.0v representative part -750 -600 -450 -300 -150 0 150 300 450 600 750 -0.5 -0.2 0.1 0.4 0.7 1.0 1.3 1.6 1.9 2.2 2.5 2.8 3.1 3.4 common mode input voltage (v) input offset voltage (v) t a = -40c t a = +25c t a = +85c t a = +125c v dd = 3.0v representative part MCP6051/2/4 ds22182a-page 8 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-7: input offset voltage vs. output voltage. figure 2-8: input offset voltage vs. power supply voltage. figure 2-9: input noise voltage density vs. frequency. figure 2-10: input noise voltage density vs. common mode input voltage. figure 2-11: cmrr, psrr vs. frequency. figure 2-12: cmrr, psrr vs. ambient temperature. -350 -250 -150 -50 50 150 250 350 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 output voltage (v) input offset voltage (v) v dd = 6.0v v dd = 1.8v v dd = 3.0v representative part -750 -600 -450 -300 -150 0 150 300 450 600 750 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 power supply voltage (v) input offset voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c representative part 10 100 1,000 0.1 1 10 100 1000 10000 100000 frequency (hz) input noise voltage density (nv/ hz) 0.1 1 10 100 1k 10k 100k 0 5 10 15 20 25 30 35 40 45 50 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input noise voltage density (nv/ hz) f = 10 khz v dd = 6.0v 20 30 40 50 60 70 80 90 100 110 10 100 1000 10000 100000 1000000 frequency (hz) cmrr, psrr (db) representative part 10 100 1k 10k 100k 1m cmrr psrr+ psrr- 60 65 70 75 80 85 90 95 100 105 110 -50 -25 0 25 50 75 100 125 ambient temperature (c) psrr,cmrr (db) psrr (v dd = 1.8v to 6.0v, v cm = v ss ) cmrr (v dd = 6.0v, v cm = -0.3v to 6.3v) ? 2009 microchip technology inc. ds22182a-page 9 MCP6051/2/4 note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-13: common mode input voltage range limit vs. ambient temperature. figure 2-14: input bias, offs et currents vs. ambient temperature. figure 2-15: input bias current vs. common mode input voltage. figure 2-16: quiescent current vs ambient temperature with v cm = 0.9v dd . figure 2-17: quiescent current vs. power supply voltage with v cm = 0.9v dd . figure 2-18: open-loop gain, phase vs. frequency. -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 -50 -25 0 25 50 75 100 125 ambient temperature (c) common mode input voltage range limit (v) v ol - v ss @ v dd = 1.8v v ol - v ss @ v dd = 3.0v v ol - v ss @ v dd = 6.0v v dd - v oh @ v dd = 6.0v @ v dd = 3.0v @ v dd = 1.8v 1 10 100 1000 10000 25 45 65 85 105 125 ambient temperature (c) input bias and offset currents (pa) v dd = 6.0v v cm = v dd input bias current input offset current 1 10 100 1000 10000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input votlage (v) input bias current (pa) v dd = 6.0v t a = +125 c t a = +85 c 10 15 20 25 30 35 40 45 -50-25 0 255075100125 ambient temperature (c) quiescent current (a/amplifier) v dd = 6.0v v cm = 0.9v dd v dd = 1.8v v cm = 0.9v dd 0 5 10 15 20 25 30 35 40 45 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 power supply voltage (v) quiescent current (ua) v dd = 6.0v v cm = 0.9v dd t a = +125c t a = +85c t a = +25c t a = -40c -20 0 20 40 60 80 100 120 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 1.e+06 1.e+07 frequency (hz) open-loop gain (db) -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () open-loop gain open-loop phase v dd = 6.0v 0.1 1 10 100 1k 10k 100k 1m 10m MCP6051/2/4 ds22182a-page 10 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-19: dc open-loop gain vs. power supply voltage. figure 2-20: dc open-loop gain vs. output voltage headroom. figure 2-21: channel-to-channel separation vs. frequency ( mcp6052/4 only). figure 2-22: gain bandwidth product, phase margin vs. common mode input voltage. figure 2-23: gain bandwidth product, phase margin vs. ambient temperature. figure 2-24: gain bandwidth product, phase margin vs. ambient temperature. 100 105 110 115 120 125 130 135 140 145 150 1.52.02.53.03.54.04.55.05.56.0 power supply voltage (v) dc-open loop gain (db) r l = 100 k ? v ss + 0.2v < v out < v dd - 0.2v 100 105 110 115 120 125 130 135 140 145 150 0.00 0.05 0.10 0.15 0.20 0.25 output voltage headroom v dd - v oh or v ol - v ss (v) dc-open loop gain (db) v dd = 6.0v v dd = 1.8v large signal a ol 80 90 100 110 120 130 140 100 1000 10000 100000 1000000 frequency (hz) channel to channel separation (db) input referred 100 1k 10k 100k 1m 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () phase margin gain bandwidth product v dd = 6.0v g = +1 v/v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -50-250 255075100125 ambient temperature (c) gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () phase margin gain bandwidth product v dd = 6.0v g = +1 v/v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () gain bandwidth product phase margin v dd = 1.8v g = +1 v/v ? 2009 microchip technology inc. ds22182a-page 11 MCP6051/2/4 note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-25: ouput short circuit current vs. power supply voltage. figure 2-26: output voltage swing vs. frequency. figure 2-27: ratio of output voltage headroom to output current vs. output current. figure 2-28: output voltage headroom vs. ambient temperature. figure 2-29: slew rate vs. ambient temperature. figure 2-30: small signal non-inverting pulse response. 0 5 10 15 20 25 30 35 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) output short circuit current (ma) t a = -40c t a = +25c t a = +85c t a = +125c 0.1 1 10 100 1000 10000 100000 1000000 frequency (hz) output voltage swing (v p-p ) v dd = 1.8v v dd = 6.0v 100 1k 10k 100k 1m 10 15 20 25 30 35 40 45 50 55 60 65 70 0.1 1 10 output current (ma) ratio of output headroom to current (mv/ma) (v ol - v ss )/(-i out ) (v dd - v oh )/i out v dd = 1.8v (v dd - v oh )/i out (v ol - v ss )/(-i out ) v dd = 6.0v 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 -50-25 0 255075100125 ambient temperature (c) output voltage headroom (mv) v dd - v oh v ss - v ol 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -50 -25 0 25 50 75 100 125 ambient temperature (c) slew rate (v/s) falling edge, v dd = 6.0v falling edge, v dd = 1.8v rising edge, v dd = 6.0v rising edge, v dd = 1.8v time (2 s/div) output voltage (20mv/div) v dd = 6.0v g = +1 v/v MCP6051/2/4 ds22182a-page 12 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-31: small signal inverting pulse response. figure 2-32: large signal non-inverting pulse response. figure 2-33: large signal inverting pulse response. figure 2-34: the MCP6051/2/4 shows no phase reversal. figure 2-35: closed loop output impedance vs. frequency. figure 2-36: measured input current vs. input voltage (below v ss ). time (2 s/div) output voltage (20mv/div) v dd = 6.0v g = -1 v/v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 time (0.02 ms/div) output voltage (v) v dd = 6.0v g = +1 v/v -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 time (0.02 ms/div) output voltage (v) v dd = 6.0v g = -1 v/v -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 time (0.1 ms/div) output voltage (v) v dd = 6.0v g = +2 v/v v out v in 1 10 100 1000 10000 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 frequency (hz) closed loop output impedance ( ? ) g n : 101 v/v 11 v/v 1 v/v 10 100 1k 10k 100k 1m 1.e-12 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 v in (v) -i in (a) 1m 100 10 1 100n 10n 1n 100p 10 p 1p t a = -40 c t a = +25c t a = +85c t a = +125c ? 2009 microchip technology inc. ds22182a-page 13 MCP6051/2/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 analog outputs the output pins are low-im pedance voltage sources. 3.2 analog inputs the non-inverting and inverting inputs are high- impedance cmos inputs with low bias currents. 3.3 power supply pins the positive power supply (v dd ) is 1.8v to 6.0v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. 3.4 exposed thermal pad (ep) there is an internal electrical connection between the exposed thermal pad (ep) and the v ss pin; they must be connected to the same potential on the printed circuit board (pcb). MCP6051 mcp6052 mcp6054 symbol description soic2x3tdfnsoic2x3tdfn soic, tssop 66111v out , v outa analog output (op amp a) 22222v in ?, v ina ? inverting input (op amp a) 33333v in +, v ina + non-inverting input (op amp a) 77884 v dd positive power supply ??555 v inb + non-inverting input (op amp b) ??666 v inb ? inverting input (op amp b) ??777 v outb analog output (op amp b) ???? 8 v outc analog output (op amp c) ???? 9 v inc ? inverting input (op amp c) ????10 v inc + non-inverting input (op amp c) 444411 v ss negative power supply ????12 v ind + non-inverting input (op amp d) ????13 v ind ? inverting input (op amp d) ????14 v outd analog output (op amp d) 1, 5, 8 1, 5, 8 ? ? ? nc no internal connection ?9?9? ep exposed thermal pad (ep); must be connected to v ss . MCP6051/2/4 ds22182a-page 14 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 15 MCP6051/2/4 4.0 application information the MCP6051/2/4 family of op amps is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, high precision applications. 4.1 rail-to-rail input 4.1.1 phase reversal the MCP6051/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-34 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors and to minimize input bias current (i b ). the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltage that go too far above v dd ; their breakdown voltage is high enough to allow normal operation and low enough to bypass esd events within the specified limits. figure 4-1: simplified analog input esd structures. in order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the voltages and currents at the v in+ and v in- pins (see absolute maximum ratings at the beginning of section 1.0 ?electri cal characteristics? ). figure 4-2 shows the recommended approach to protecting these inputs. the internal esd diodes prevent the input pins (v in + and v in -) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pins. diodes d 1 and d 2 prevent the input pins (v in + and v in -) from going too far above v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-2: protecting the analog inputs. it is also possible to connect the diodes to the left of the resistors r 1 and r 2 . in this case, the currents through the diodes d 1 and d 2 need to be limited by some other mechanism. the resistors th en serve as in-rush current limiters; the dc currents into the input pins (v in + and v in -) should be very small. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ). (see figure 2-36 ). 4.1.3 normal operation the input stage of the mcp6 051/2/4 op amps uses two differential input stages in parallel. one operates at a low common mode input voltage (v cm ), while the other operates at a high v cm . with this topology, the device operates with a v cm up to 300 mv above v dd and 300 mv below v ss . (see figure 2-13 ) .the input offset voltage is measured at v cm = v ss ?0.3v and v dd + 0.3v to ensure proper operation. the transition between the input stages occurs when v cm is near v dd ?1.1v (see figures 2-4 , 2-5 and figure 2-6 ). for the best dist ortion performance and gain linearity, with non-invert ing gains, avoid this region of operation. 4.2 rail-to-rail output the output voltage range of the MCP6051/2/4 op amps is v ss + 15 mv (minimum) and v dd ?15mv (maximum) when r l =10k is connected to v dd /2 and v dd = 6.0v. refer to figures 2-27 and 2-28 for more information. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 r 1 v dd d 1 r 1 > v ss ? (minimum expected v 1 ) 2ma r 2 > v ss ? (minimum expected v 2 ) 2ma v 2 r 2 d 2 r 3 mcp605x MCP6051/2/4 ds22182a-page 16 ? 2009 microchip technology inc. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces ga in peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = +1), a small series resistor at the output (r iso in figure 4-3 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitance load. figure 4-3: output resistor, r iso stabilizes large capacitive loads. figure 4-4 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit's noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1+|signal gain| (e.g., -1 v/v gives g n = +2 v/v). figure 4-4: recommended r iso values for capacitive loads. after selecting r iso for your circuit, double-check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the MCP6051/2/4 spice macro model are very helpful. 4.4 supply bypass with this family of operat ional amplifiers, the power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. 4.5 unused op amps an unused op amp in a quad package (mcp6054) should be configured as shown in figure 4-5 . these circuits prevent the output from toggling and causing crosstalk. circuits a sets the op amp at its minimum noise gain. the resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. circuit b uses the minimum number of components and operates as a comparator, but it may draw more current. figure 4-5: unused op amps. v in r iso v out c l ? + mcp605x 1 10 100 1000 10000 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 normalized load capacitance; c l /g n (f) recommended r iso ( ? ) g n : 1 v/v 2 v/v 5 v/v v dd = 6.0 v r l = 100 k ? 10p 100p 1n 10n 0.1 1 v dd v dd r 1 r 2 v dd v ref v ref v dd r 2 r 1 r 2 + -------------------- = ? mcp6054 (a) ? mcp6054 (b) ? 2009 microchip technology inc. ds22182a-page 17 MCP6051/2/4 4.6 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow; which is greater than the MCP6051/2/4 family?s bias current at +25c (1.0 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-6 . figure 4-6: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a) connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b) connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance gain amplifiers (convert current to voltage, such as photo detectors): a) connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b) connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. 4.7 application circuits 4.7.1 gyrator the MCP6051/2/4 op amps can be used in gyrator applicaitons. the gyrator is an electric circuit which can make a capacitive circuit behave inductively. figure 4- 7 shows an example of a gyrator simulating inductance, with an approx imately equivalent circuit below. the two z in have similar values in typical applications. the primary application for a gyrator is to reduce the size and cost of a system by removing the need for bulky, heavy and expensive inductors. for example, rlc bandpass filt er characteristics can be realized with capacitors, resistors and operational amplifiers without using inductors. moreover, gyrators will typically have higher ac curacy than real inductors, due to the lower cost of precision capacitors than inductors. . figure 4-7: gyrator. guard ring v in ?v in + v ss r l v out gyrator z in r c z in r l j l + = lr l rc = r l l z in equivalent circuit MCP6051 MCP6051/2/4 ds22182a-page 18 ? 2009 microchip technology inc. 4.7.2 instrumenta tion amplifier the MCP6051/2/4 op amps are well suited for condi- tioning sensor signals in battery-powered applications. figure 4-8 shows a two op amp instrumentation amplifier, using the mcp6052, that works well for applications requiring reje ction of common mode noise at higher gains. the reference voltage (v ref ) is supplied by a low impedance source. in single supply applications, v ref is typically v dd /2. figure 4-8: two op amp instrumentation amplifier. to obtain the best cmrr possible, and not limit the performance by the resistor tolerances, set a high gain with the rg resistor. 4.7.3 precision comparator use high gain before a comparator to improve the latter?s input offset performance. figure 4-9 shows a gain of 11 v/v placed before a comparator. the reference voltage v ref can be any value between the supply rails. figure 4-9: precision, non-inverting comparator. v out v 1 v 2 ? () 1 r 1 r 2 ----- - 2r 1 r g --------- ++ ?? ?? v ref + = v ref r 1 r 2 r 2 r 1 v out r g v 2 v 1 ? ? mcp6052 mcp6052 v in 1m v out 100 k mcp6541 v ref MCP6051 ? 2009 microchip technology inc. ds22182a-page 19 MCP6051/2/4 5.0 design aids microchip provides the basic design tools needed for the MCP6051/2/4 family of op amps. 5.1 spice macro model the latest spice macro model for the MCP6051/2/4 op amps is available on the microchip web site at www.microchip.com. this model is intended to be an initial design tool that works well in the op amp?s linear region of operation over t he temperature range. see the model file for information on its capabilities. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchip?s filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.m icrochip.com/filterlab, the filterlab design tool prov ides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 mindi? circuit designer & simulator microchip?s mindi? circuit designer & simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. it is a free online circuit designer & simulator available from the microchip web site at www.microchip.com/mindi. this interactive circuit designer & simulator enables designers to quickly generate circuit diagrams, simulate circuits. circuits developed using the mindi circuit designer & simulator can be downloaded to a personal computer or workstation. 5.4 microchip advanced part selector (maps) maps is a software tool that helps semiconductor professionals efficiently id entify microchip devices that fit a particular design requirement. available at no cost from the microchip website at www.microchip.com/ maps, the maps is an overall selection tool for microchip?s product portfolio that includes analog, memory, mcus and dscs. using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparasion reports. helpful links are also provided for datasheets, purchase, and sampling of microchip parts. 5.5 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluat ion boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web si te at www.microchip.com/ analogtools. some boards that are especially useful are: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, p/n vsupev2 ? 8-pin soic/msop/tssop/ dip evaluation board, p/n soic8ev ? 14-pin soic/tssop/dip evaluation board, p/n soic14ev 5.6 application notes the following microchip analog design note and application notes are available on the microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources: ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 these application notes and others are listed in the design guide: ? ?signal chain design guide?, ds21825 MCP6051/2/4 ds22182a-page 20 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 21 MCP6051/2/4 6.0 packaging information 6.1 package marking information 8-lead soic (150 mil) (MCP6051, mcp6052) example: xxxxxxxx xxxxyyww nnn MCP6051e sn^^0919 256 legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 3 e example: aha 919 25 8-lead 2x3 tdfn (MCP6051, mcp6052) xxx yww nn 14-lead tssop ( mcp6054 ) example: 14-lead soic (150 mil) ( mcp6054 ) example: xxxxxxxxxxx yywwnnn xxxxxxxx yyww nnn mcp6054 e 0919 256 xxxxxxxxxxx mcp6054 0919256 e/sl^^ 3 e MCP6051/2/4 ds22182a-page 22 ? 2009 microchip technology inc. !"#$% & ! " #$ %! & '(!%&! %( % ")%% % " * $ %+ % % , & "- "%!" &"$ %! "$ %! % # " .&& " & "% -/ . 0+1 0 & % # % ! ))%!%% -21 $ & '! ! )%!%% '$$& % ! & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 5% 66-- & 6&% 7 78 9 7!&( $ 7 : % 0+ 8 ; % < < . " " 3 3 . < < % "$$ * < . 8 ="% - > 0+ " " 3 ="% - , 0+ 8 6 % 0+ + &$ ? % @ . < . 2%6 % 6 < 2% % 6 -2 2% a < :a 6 "3 < . 6 "="% ( , < . " $% .a < .a " $% 0%%& .a < .a d n e e e1 note 1 12 3 b a a1 a2 l l1 c h h ) + .0 ? 2009 microchip technology inc. ds22182a-page 23 MCP6051/2/4 !"#$% & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 MCP6051/2/4 ds22182a-page 24 ? 2009 microchip technology inc. ' ( )*+,- - ./ !"0'(% & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 ? 2009 microchip technology inc. ds22182a-page 25 MCP6051/2/4 ' ( )*+,- - ./ !"0'(% & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 MCP6051/2/4 ds22182a-page 26 ? 2009 microchip technology inc. 12 !"#$% & ! " #$ %! & '(!%&! %( % ")%% % " * $ %+ % % , & "- "%!" &"$ %! "$ %! % # " .&& " & "% -/ . 0+1 0 & % # % ! ))%!%% -21 $ & '! ! )%!%% '$$& % ! & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 5% 66-- & 6&% 7 78 9 7!&( $ 7 % 0+ 8 ; % < < . " " 3 3 . < < % "$$* < . 8 ="% - > 0+ " " 3 ="% - , 0+ 8 6 % : >.0+ + &$ ? % @ . < . 2%6 % 6 < 2% % 6 -2 2% a < :a 6 "3 < . 6 "="% ( , < . " $% .a < .a " $% 0%%& .a < .a note 1 n d e e1 1 23 b e a a1 a2 l l1 c h h ) + >.0 ? 2009 microchip technology inc. ds22182a-page 27 MCP6051/2/4 & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 MCP6051/2/4 ds22182a-page 28 ? 2009 microchip technology inc. 12 03 3 ) 02 2 !"0 % & ! " #$ %! & '(!%&! %( % ")%% % " & "- "%!" &"$ %! "$ %! % # " .&& " , & "% -/ . 0+1 0 & % # % ! ))%!%% -21 $ & '! ! )%!%% '$$& % ! & 2% & %! % 3 " ) ' % 3 $ % % " % %% 144))) & &4 3 5% 66-- & 6&% 7 78 9 7!&( $ 7 % >.0+ 8 ; % < < " " 3 3 : . % "$$ . < . 8 ="% - > 0+ " " 3 ="% - , . " " 3 6 % . . 2%6 % 6 . > . 2% % 6 -2 2% a < :a 6 "3 < 6 "="% ( < , note 1 d n e e1 1 2 e b c a a1 a2 l1 l ) + :0 ? 2009 microchip technology inc. ds22182a-page 29 MCP6051/2/4 appendix a: revision history revision a (may 2009) ? original release of this document. MCP6051/2/4 ds22182a-page 30 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 31 MCP6051/2/4 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . part no. x /xx package temperature range device device: MCP6051: single op amp MCP6051t: single op amp (tape and reel) (soic and 2x3 tdfn) mcp6052: dual op amp mcp6052t: dual op amp (tape and reel) (soic and 2x3 tdfn) mcp6054: quad op amp mcp6054t: quad op amp (tape and reel) (soic and tssop) temperature range: e = -40c to +125c package: mny * = plastic dual flat, no lead, (2x3 tdfn ) 8-lead sl = plastic soic (150 mil body), 14-lead sn = plastic soic, (150 mil body), 8-lead st = plastic tssop (4.4mm body), 14-lead * y = nickel palladium gold manufacturing designator. only available on the tdfn package. examples: a) MCP6051-e/sn: 8ld soic package b) MCP6051t-e/sn: tape and reel, 8ld soic package c) MCP6051-e/mny: 8ld 2x3 tdfn package d) MCP6051t-e/mny: tape and reel, 8ld 2x3 tdfn package a) mcp6052-e/sn: 8ld soic package b) mcp6052t-e/sn: tape and reel, 8ld soic package c) mcp6052-e/mny: 8ld 2x3 tdfn package d) mcp6052t-e/mny: tape and reel 8ld 2x3 tdfn package a) mcp6054-e/sl: 14ld soic package b) mcp6054t-e/sl: tape and reel, 14ld soic package c) mcp6054-e/st: 14ld tssop package d) mcp6054t-e/st: tape and reel, 14ld tssop package MCP6051/2/4 ds22182a-page 32 ? 2009 microchip technology inc. notes: ? 2009 microchip technology inc. ds22182a-page 33 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, rfpic, smartshunt and uni/o are registered trademarks of microchip te chnology incorporated in the u.s.a. and other countries. filterlab, hampshire, linear active thermistor, mxdev, mxlab, seeval, smartsensor and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, nanowatt xlp, pickit, picdem, picdem.net, pictail, pic 32 logo, powercal, powerinfo, powermate, powertool, real ice, rflab, select mode, total endurance, tsharc, wiperlock and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2009, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. ds22182a-page 34 ? 2009 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4080 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-6578-300 fax: 886-3-6578-370 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 03/26/09 |
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